RISC-V on Trial: A Technical Critique That Hit a Nerve
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Every Intellegix briefing is generated from that day's broadcast and run through automated checks before it publishes — with a human paged on any flag. Here is the trail for this edition.
Hardware hacker Dmitry Grinberg's essay — titled 'They Should Have Known Better' — drew 326 points and 373 comments and is unusual in RISC-V discourse for being rigorously critical rather than broadly enthusiastic or vaguely skeptical. Grinberg's argument is that the RISC-V instruction set architecture made specific knowable mistakes in areas including memory ordering, vector extensions, and privilege architecture, and that the committee process that produced those decisions should have recognized them at the time. The tone is not anti-RISC-V philosophically; Grinberg's stated concern is that open ISAs succeed, and his critique is that specific decisions are accumulating technical debt that will compound as the architecture scales into more demanding applications.
The memory ordering debate attracted the most comment activity. RISC-V uses a relatively relaxed memory model called RVWMO — RISC-V Weak Memory Ordering. Critics argue that while relaxed memory ordering can be more efficient in theory, it creates substantial implementation complexity for anyone running existing software, particularly operating systems and concurrency-heavy code written against stronger memory model assumptions. Defenders counter that modern hardware already handles this complexity and RISC-V is simply being explicit about it.
The stakes extend beyond academic architecture debates. RISC-V has attracted investment from Western Digital, Qualcomm, a consortium of European semiconductor interests, and Indian government-backed semiconductor initiatives. If fundamental design choices create implementation costs at scale, those costs will surface as adoption friction precisely when RISC-V needs to prove itself in high-performance applications. The split in the HN comment thread was telling: those working in embedded and microcontroller contexts largely found Grinberg's concerns inapplicable to the simplified RISC-V subset they use; those implementing high-performance stacks that run full operating systems were considerably more sympathetic.
On the open hardware side, comma.ai's Chestnut eGPU dock received a quieter but positive reception — an external GPU dock with open-source firmware priced at $249 for the bare unit and $799 bundled with an RX 9060 GPU. The open-source firmware commitment, rare in the category, was the primary draw for a community increasingly attentive to the ability to audit and modify hardware stacks.